| 790 | } |
| 791 | |
| 792 | eas::PredictResponse Tensor2Response( |
| 793 | const processor::Request& req, |
| 794 | const processor::Response& resp, |
| 795 | const SignatureInfo* signature_info) { |
| 796 | eas::PredictResponse response; |
| 797 | const auto& output_tensor_names = req.output_tensor_names; |
| 798 | const auto & outputs = resp.outputs; |
| 799 | |
| 800 | for (size_t i = 0; i < outputs.size(); ++i) { |
| 801 | eas::ArrayProto output; |
| 802 | int64 total_dim_size = 1; |
| 803 | for (int j = 0; j < outputs[i].dims(); ++j) { |
| 804 | int64 dim_size = outputs[i].dim_size(j); |
| 805 | output.mutable_array_shape()->add_dim(dim_size); |
| 806 | total_dim_size *= dim_size; |
| 807 | } |
| 808 | |
| 809 | switch (outputs[i].dtype()) { |
| 810 | case DT_FLOAT: { |
| 811 | output.set_dtype(eas::DT_FLOAT); |
| 812 | auto flat = outputs[i].flat<float>(); |
| 813 | for (int64 j = 0; j < total_dim_size; ++j) { |
| 814 | output.add_float_val(flat(j)); |
| 815 | } |
| 816 | break; |
| 817 | } |
| 818 | case DT_DOUBLE: { |
| 819 | output.set_dtype(eas::DT_DOUBLE); |
| 820 | auto flat = outputs[i].flat<double>(); |
| 821 | for (int64 j = 0; j < total_dim_size; ++j) { |
| 822 | output.add_double_val(flat(j)); |
| 823 | } |
| 824 | break; |
| 825 | } |
| 826 | case DT_INT32: { |
| 827 | output.set_dtype(eas::DT_INT32); |
| 828 | auto flat = outputs[i].flat<int>(); |
| 829 | for (int64 j = 0; j < total_dim_size; ++j) { |
| 830 | output.add_int_val(flat(j)); |
| 831 | } |
| 832 | break; |
| 833 | } |
| 834 | case DT_UINT8: { |
| 835 | output.set_dtype(eas::DT_UINT8); |
| 836 | auto flat = outputs[i].flat<uint8>(); |
| 837 | for (int64 j = 0; j < total_dim_size; ++j) { |
| 838 | output.add_int_val((int)flat(j)); |
| 839 | } |
| 840 | break; |
| 841 | } |
| 842 | case DT_INT16: { |
| 843 | output.set_dtype(eas::DT_INT16); |
| 844 | auto flat = outputs[i].flat<int16>(); |
| 845 | for (int64 j = 0; j < total_dim_size; ++j) { |
| 846 | output.add_int_val((int)flat(j)); |
| 847 | } |
| 848 | break; |
| 849 | } |
no test coverage detected