Method LoadBlock

Source/HLEGraphics/RDPStateManager.cpp:357–456

}

void CRDPStateManager::LoadBlock(const SetLoadTile & load)
{
	u32 uls			{load.sl};	//Left
	u32 ult			{load.tl};	//Top
	u32 dxt			{load.th};	// 1.11 fixed point
	u32 tile_idx {load.tile};
	u32 address		{g_TI.GetAddress( uls, ult )};
	//u32 ByteSize	= (load.sh + 1) << (g_TI.Size == G_IM_SIZ_32b);

	bool	swapped = (dxt) ? false : true;

#ifdef DAEDALUS_DEBUG_DISPLAYLIST
	DL_PF("    Tile[%d] (%d,%d - %d) DXT[0x%04x] = [%d]Bytes/line => [%d]Pixels/line Address[0x%08x]",
		tile_idx,
		uls, ult,
		load.sh,
		dxt,
		(g_TI.Width << g_TI.Size >> 1),
		bytes2pixels( (g_TI.Width << g_TI.Size >> 1), g_TI.Size ),
		address);
#endif

	InvalidateAllTileTextureInfo();		// Can potentially invalidate all texture infos

	const RDP_Tile & rdp_tile {mTiles[tile_idx]};

	u32	tmem_lookup {(u32)(rdp_tile.tmem >> 4)};

	//Invalidate load info after current TMEM address to the end of TMEM (fixes Fzero and SSV) //Corn
	ClearEntries( tmem_lookup );
	SetValidEntry( tmem_lookup );

	TimgLoadDetails & info = mTmemLoadInfo[ tmem_lookup ];
	info.Address = address;
	info.Pitch	 = ~0;
	info.Swapped = swapped;


#ifdef DAEDALUS_ACCURATE_TMEM
	u32 lrs    {load.sh};
	u32 bytes  {((lrs+1) << g_TI.Size) >> 1};

	DAEDALUS_DL_ASSERT( bytes <= 4096, "Suspiciously large loadblock: %d bytes", bytes );
	DAEDALUS_DL_ASSERT( bytes, "LoadBLock: No bytes??" );

	u32 qwords {(bytes+7) / 8};
	u32 tmem_offset {(rdp_tile.tmem << 3)};
	u32 ram_offset  {address};

	if (( (address + bytes) > MAX_RAM_ADDRESS) || (tmem_offset + bytes) > MAX_TMEM_ADDRESS )
	{
		DBGConsole_Msg(0, "[WWarning LoadBlock address is invalid]" );
		return;
	}

	u32* dst {(u32*)(gTMEM + tmem_offset)};
	u32* src {(u32*)(g_pu8RamBase + ram_offset)};