Method Simulate

Source/DynaRec/Fragment.cpp:255–518

//
//*************************************************************************************
CFragment * CFragment::Simulate()
{
	#ifdef DAEDALUS_ENABLE_ASSERTS
	DAEDALUS_ASSERT( gCPUState.GetStuffToDo() == 0, "Entering when there is stuff to do?" );
	DAEDALUS_ASSERT( gCPUState.CurrentPC == mEntryAddress, "Why are we entering at the wrong address?" );
	DAEDALUS_ASSERT( gCPUState.Delay == NO_DELAY, "Why are we entering with a delay slot active?" );
#endif
#ifdef FRAGMENT_RETAIN_ADDITIONAL_INFO
	mHitCount++;
#endif

	//
	//	Keep executing ops until we take a branch
	//
	u32			instructions_executed( 0 );

	u32			branch_idx_taken( INVALID_IDX );		// Index into mBranchBuffer of the taken branch
	u32			branch_taken_address( 0 );
	bool		checked_cop1_usable( false );

	u32			count_entry( gCPUState.CPUControl[C0_COUNT]._u32_0 );

	OpCode		last_executed_op;

	for( auto i {}; i < mTraceBuffer.size(); ++i)
	{
		const STraceEntry & ti( mTraceBuffer[ i ] );
		OpCode				op_code( ti.OpCode );
		u32					branch_idx( ti.BranchIdx );

#ifdef DAEDALUS_ENABLE_ASSERTS
		DAEDALUS_ASSERT( op_code._u32 == *(u32*)ReadAddress( ti.Address ), "Self modifying code detected but not handled" );
#endif
		bool				branch_taken;

		if( ti.BranchDelaySlot )
		{
			gCPUState.Delay = EXEC_DELAY;
		}

		DAEDALUS_ASSERT( gCPUState.Delay == (ti.BranchDelaySlot ? EXEC_DELAY : NO_DELAY), "Delay doesn't match expectations" );

		// Check the cop1 usable flag. Do this only once (theoretically it could be toggled mid-fragment but this is unlikely)
		if( op_code.op == OP_COPRO1 && !checked_cop1_usable )
		{
			checked_cop1_usable = true;
			CheckCop1Usable();
			if(gCPUState.GetStuffToDo() != 0)
			{
				UpdateCountAndHandleException_Counter( instructions_executed );
				return nullptr;
			}
		}

		last_executed_op = op_code;

		CPU_ExecuteOpRaw( count_entry+instructions_executed, ti.Address, op_code, R4300_GetInstructionHandler( op_code ), &branch_taken );