| 189 | |
| 190 | |
| 191 | bool SaveState_SaveToFile( const char * filename ) |
| 192 | { |
| 193 | SaveState_ostream_gzip stream( filename ); |
| 194 | |
| 195 | if( !stream.IsValid() ) |
| 196 | return false; |
| 197 | |
| 198 | stream << SAVESTATE_PROJECT64_MAGIC_NUMBER; |
| 199 | stream << gRamSize; |
| 200 | ROMHeader rom_header; |
| 201 | memcpy(&rom_header, &g_ROM.rh, 64); |
| 202 | ROMFile::ByteSwap_3210(&rom_header, 64); |
| 203 | stream << rom_header; |
| 204 | stream << Max< u32 >(CPU_GetVideoInterruptEventCount(), 1); |
| 205 | |
| 206 | stream << gCPUState.CurrentPC; |
| 207 | stream.write(gGPR, 256); |
| 208 | u32 i; |
| 209 | for(i = 0; i < 32; i++) |
| 210 | { |
| 211 | stream << gCPUState.FPU[i]._u32; |
| 212 | } |
| 213 | stream.skip(0x80); // used when FPU is in 64-bit mode |
| 214 | for(i = 0; i < 32; i++) |
| 215 | { |
| 216 | stream << gCPUState.CPUControl[i]._u32; |
| 217 | } |
| 218 | for(i = 0; i < 32; i++) |
| 219 | { |
| 220 | stream << gCPUState.FPUControl[i]._u32; |
| 221 | } |
| 222 | stream << gCPUState.MultHi._u64; |
| 223 | stream << gCPUState.MultLo._u64; |
| 224 | |
| 225 | stream.write_memory_buffer(MEM_RD_REG0, 0x28); |
| 226 | stream.write_memory_buffer(MEM_SP_REG, 0x28); |
| 227 | stream.write_memory_buffer(MEM_DPC_REG, 0x28); |
| 228 | |
| 229 | stream.write_memory_buffer(MEM_MI_REG); |
| 230 | stream.write_memory_buffer(MEM_VI_REG); |
| 231 | stream.write_memory_buffer(MEM_AI_REG); |
| 232 | stream.write_memory_buffer(MEM_PI_REG); |
| 233 | stream.write_memory_buffer(MEM_RI_REG); |
| 234 | stream << Memory_SI_GetRegister( SI_DRAM_ADDR_REG ); |
| 235 | stream << Memory_SI_GetRegister( SI_PIF_ADDR_RD64B_REG ); |
| 236 | stream << Memory_SI_GetRegister( SI_PIF_ADDR_WR64B_REG ); |
| 237 | stream << Memory_SI_GetRegister( SI_STATUS_REG ); |
| 238 | for(i = 0; i < 32; i++) |
| 239 | { |
| 240 | // boolean that tells whether the entry is defined |
| 241 | stream << (u32)(((g_TLBs[i].pfne & TLBLO_V) || (g_TLBs[i].pfno & TLBLO_V)) ? 1 : 0); |
| 242 | stream << (u32)g_TLBs[i].pagemask; |
| 243 | stream << (u32)g_TLBs[i].hi; |
| 244 | stream << (u32)g_TLBs[i].pfne; |
| 245 | stream << (u32)g_TLBs[i].pfno; |
| 246 | } |
| 247 | |
| 248 | stream.write( g_pMemoryBuffers[MEM_PIF_RAM], 0x40); |
no test coverage detected