| 702 | #undef DISPLAY_DPC_WRITES |
| 703 | |
| 704 | void MemoryUpdateDP( u32 flags ) |
| 705 | { |
| 706 | // Ignore address, as this is only called with DPC_STATUS_REG write |
| 707 | // DBGConsole_Msg(0, "DP Status: 0x%08x", flags); |
| 708 | |
| 709 | u32 dpc_status {Memory_DPC_GetRegister(DPC_STATUS_REG)}; |
| 710 | bool unfreeze_task {false}; |
| 711 | |
| 712 | // ToDO : Avoid branching |
| 713 | if (flags & DPC_CLR_XBUS_DMEM_DMA) dpc_status &= ~DPC_STATUS_XBUS_DMEM_DMA; |
| 714 | if (flags & DPC_SET_XBUS_DMEM_DMA) dpc_status |= DPC_STATUS_XBUS_DMEM_DMA; |
| 715 | if (flags & DPC_CLR_FREEZE) { dpc_status &= ~DPC_STATUS_FREEZE; unfreeze_task = true; } |
| 716 | if (flags & DPC_SET_FREEZE) dpc_status |= DPC_STATUS_FREEZE; |
| 717 | if (flags & DPC_CLR_FLUSH) dpc_status &= ~DPC_STATUS_FLUSH; |
| 718 | if (flags & DPC_SET_FLUSH) dpc_status |= DPC_STATUS_FLUSH; |
| 719 | |
| 720 | /* |
| 721 | if (flags & DPC_CLR_TMEM_CTR) Memory_DPC_SetRegister(DPC_TMEM_REG, 0); |
| 722 | if (flags & DPC_CLR_PIPE_CTR) Memory_DPC_SetRegister(DPC_PIPEBUSY_REG, 0); |
| 723 | if (flags & DPC_CLR_CMD_CTR) Memory_DPC_SetRegister(DPC_BUFBUSY_REG, 0); |
| 724 | if (flags & DPC_CLR_CLOCK_CTR) Memory_DPC_SetRegister(DPC_CLOCK_REG, 0); |
| 725 | */ |
| 726 | |
| 727 | #ifdef DISPLAY_DPC_WRITES |
| 728 | if ( flags & DPC_CLR_XBUS_DMEM_DMA ) DBGConsole_Msg( 0, "DPC_CLR_XBUS_DMEM_DMA" ); |
| 729 | if ( flags & DPC_SET_XBUS_DMEM_DMA ) DBGConsole_Msg( 0, "DPC_SET_XBUS_DMEM_DMA" ); |
| 730 | if ( flags & DPC_CLR_FREEZE ) DBGConsole_Msg( 0, "DPC_CLR_FREEZE" ); |
| 731 | if ( flags & DPC_SET_FREEZE ) DBGConsole_Msg( 0, "DPC_SET_FREEZE" ); |
| 732 | if ( flags & DPC_CLR_FLUSH ) DBGConsole_Msg( 0, "DPC_CLR_FLUSH" ); |
| 733 | if ( flags & DPC_SET_FLUSH ) DBGConsole_Msg( 0, "DPC_SET_FLUSH" ); |
| 734 | if ( flags & DPC_CLR_TMEM_CTR ) DBGConsole_Msg( 0, "DPC_CLR_TMEM_CTR" ); |
| 735 | if ( flags & DPC_CLR_PIPE_CTR ) DBGConsole_Msg( 0, "DPC_CLR_PIPE_CTR" ); |
| 736 | if ( flags & DPC_CLR_CMD_CTR ) DBGConsole_Msg( 0, "DPC_CLR_CMD_CTR" ); |
| 737 | if ( flags & DPC_CLR_CLOCK_CTR ) DBGConsole_Msg( 0, "DPC_CLR_CLOCK_CTR" ); |
| 738 | |
| 739 | DBGConsole_Msg( 0, "Modified DPC_STATUS_REG - now %08x", dpc_status ); |
| 740 | #endif |
| 741 | |
| 742 | Memory_DPC_SetRegister(DPC_STATUS_REG, dpc_status); |
| 743 | |
| 744 | if (unfreeze_task) |
| 745 | { |
| 746 | u32 status {Memory_SP_GetRegister( SP_STATUS_REG )}; |
| 747 | if((status & SP_STATUS_HALT) == 0) |
| 748 | { |
| 749 | #ifdef DAEDALUS_ENABLE_ASSERTS |
| 750 | DAEDALUS_ASSERT( (status & SP_STATUS_BROKE) == 0, "Unexpected RSP HLE status %08x", status ); |
| 751 | #endif |
| 752 | RSP_HLE_ProcessTask(); |
| 753 | } |
| 754 | } |
| 755 | } |
| 756 | |
| 757 | void MemoryUpdateMI( u32 value ) |
| 758 | { |
nothing calls this directly
no test coverage detected