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Function configureApbClockDivider

source/chip/STM32/STM32L4/STM32L4-RCC.cpp:56–76  ·  view source on GitHub ↗

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54}
55
56int configureApbClockDivider(const bool ppre2, const uint8_t ppre)
57{
58 static const std::pair<decltype(ppre), std::array<decltype(RCC_CFGR_PPRE1_DIV1), 2>> associations[]
59 {
60 {ppreDiv1, {RCC_CFGR_PPRE1_DIV1, RCC_CFGR_PPRE2_DIV1}},
61 {ppreDiv2, {RCC_CFGR_PPRE1_DIV2, RCC_CFGR_PPRE2_DIV2}},
62 {ppreDiv4, {RCC_CFGR_PPRE1_DIV4, RCC_CFGR_PPRE2_DIV4}},
63 {ppreDiv8, {RCC_CFGR_PPRE1_DIV8, RCC_CFGR_PPRE2_DIV8}},
64 {ppreDiv16, {RCC_CFGR_PPRE1_DIV16, RCC_CFGR_PPRE2_DIV16}},
65 };
66
67 for (auto& association : associations)
68 if (association.first == ppre)
69 {
70 static const decltype(RCC_CFGR_PPRE1) masks[] {RCC_CFGR_PPRE1, RCC_CFGR_PPRE2};
71 RCC->CFGR = (RCC->CFGR & ~masks[ppre2]) | association.second[ppre2];
72 return 0;
73 }
74
75 return EINVAL;
76}
77
78void configurePllClockSource(const PllClockSource pllClockSource)
79{

Callers 1

chipLowLevelInitializerFunction · 0.70

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