Returns the operand id. The value returned should be interpreted accordingly to the operand type: None - Should be `0`. Reg - Physical or virtual

Returns the instruction id with modifiers.

Returns the number of implicit operands this signature has.

Returns comment/annotation of the next instruction.

Inserts an `item` at the specified `index` (unsafe case).

Returns instruction RW flags.

Tests whether this node is `AlignNode`.

Tests whether this node is `CommentNode`.

Tests whether the emitter inherits from `BaseCompiler`.

Tests whether this node is `ConstPoolNode`.

Tests whether the node is data that cannot be executed.

Tests whether this immediate value is a double precision floating point value.

Tests whether this node is `EmbedDataNode`.

Tests whether this node is `EmbedLabelNode`.

Tests whether this node is `EmbedLabelDeltaNode`.

Tests whether the instruction uses EVEX (can be set together with VEX if both are encodable).

Returns true if the given double precision floating point `val` can be encoded as ARM IMM8 value, which represents a limited set of floating point imm

Tests whether a given type is a scalar 80-bit float.

Tests whether the register is a high GPB register (8-bit).

Tests whether the operand is implicit.

Gets whether the current ARM mode is THUMB (alternative to 32-bit ARM encoding).

Tests whether the node is informative only (is never encoded like comment, etc...).

Tests whether a given type is a scalar 64-bit integer (signed).

Tests whether the ABI is MSVC.

Tests whether the environment platform is Windows.

Tests whether this operand is both read and write.

Tests whether the address type is \ref AddrType::kRel.

Tests whether the node is removable if it's in an unreachable code block.

Tests whether a given type `typeId` is scalar (has no vector part).

Tests whether this instruction can be transformed to another instruction if necessary.

Tests whether the instruction uses TSIB (AMX, instruction requires MOD+SIB).

Tests whether the immediate can be casted to 32-bit unsigned integer.

Tests whether a given type is a scalar 64-bit integer (unsigned).

Gets whether the register is a VEC-Q register (128-bit).

Tests whether the CPU vendor string is equal to `s`.

Tests whether the instruction uses VEX (can be set together with EVEX if both are encodable).

Tests whether the given `reg` is a virtual register having a valid id.

Tests whether this operand is write only.

Returns \ref Support::BitVectorIterator, that can be used to iterate over all features efficiently.

\overload

Returns the last node.

Returns link register id, if the architecture provides it.

Logs string `str`, which is either null terminated or having size `size`.

Returns the minimum size of all items added to the constant pool.

Returns either MAP_JIT or 0 based on `memoryFlags` and the host operating system.

Returns maximum protection flags from `memoryFlags`. Uses: - `PROT_MPROTECT()` on NetBSD. - `PROT_MAX()` when available(BSD).