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hub / github.com/CVCUDA/CV-CUDA / FillNVCVTensorData

Function FillNVCVTensorData

python/mod_cvcuda/nvcv/Tensor.cpp:91–143  ·  view source on GitHub ↗

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89namespace {
90
91NVCVTensorData FillNVCVTensorData(const DLTensor &tensor, std::optional<nvcv::TensorLayout> layout,
92 NVCVTensorBufferType bufType)
93{
94 NVCVTensorData tensorData = {};
95
96 // dtype ------------
97 tensorData.dtype = py::cast<nvcv::DataType>(ToDType(ToNVCVDataType(tensor.dtype)));
98
99 // layout ------------
100 if (layout)
101 {
102 tensorData.layout = *layout;
103 }
104
105 // rank ------------
106 {
107 // TODO: Add 0D support
108 int rank = tensor.ndim == 0 ? 1 : tensor.ndim;
109 if (rank < 1 || rank > NVCV_TENSOR_MAX_RANK)
110 {
111 throw std::invalid_argument(util::FormatString("Number of dimensions must be between 1 and %d, not %d",
112 NVCV_TENSOR_MAX_RANK, rank));
113 }
114 tensorData.rank = rank;
115 }
116
117 // shape ------------
118 std::copy_n(tensor.shape, tensor.ndim, tensorData.shape);
119
120 // buffer type ------------
121 if (IsCudaAccessible(tensor.device.device_type))
122 {
123 tensorData.bufferType = NVCV_TENSOR_BUFFER_STRIDED_CUDA;
124 }
125 else
126 {
127 throw std::runtime_error("Only CUDA-accessible tensors are supported for now");
128 }
129
130 NVCVTensorBufferStrided &dataStrided = tensorData.buffer.strided;
131
132 // stride ------------
133 int elemStrideBytes = (tensor.dtype.bits * tensor.dtype.lanes + 7) / 8;
134 for (int d = 0; d < tensor.ndim; ++d)
135 {
136 dataStrided.strides[d] = tensor.strides[d] * elemStrideBytes;
137 }
138
139 // Memory buffer ------------
140 dataStrided.basePtr = reinterpret_cast<NVCVByte *>(tensor.data) + tensor.byte_offset;
141
142 return tensorData;
143}
144
145NVCVTensorData FillNVCVTensorDataCUDA(const DLTensor &tensor, std::optional<nvcv::TensorLayout> layout)
146{

Callers 1

FillNVCVTensorDataCUDAFunction · 0.85

Calls 4

FormatStringFunction · 0.85
IsCudaAccessibleFunction · 0.85
ToDTypeFunction · 0.70
ToNVCVDataTypeFunction · 0.70

Tested by

no test coverage detected