Function spi_write

core/spi.c:205–256

Write to the SPI range of ports */

/* Write to the SPI range of ports */
static void spi_write(uint16_t addr, uint8_t byte, bool poke) {
    (void)poke;
    uint32_t shift = (addr & 3) << 3, value = (uint32_t)byte << shift, mask = ~(0xFFu << shift);
    bool stateChanged = false;
    switch (addr >> 2) {
        case 0x00 >> 2: // CR0
            value &= 0xFFFF;
            spi.cr0 &= mask;
            spi.cr0 |= value;
            break;
        case 0x04 >> 2: // CR1
            value &= 0x7FFFFF;
            spi.cr1 &= mask;
            spi.cr1 |= value;
            break;
        case 0x08 >> 2: // CR2
            if (value & 1 << 2) {
                spi.rfvi = spi.rfve = 0;
                stateChanged = true;
            }
            if (value & 1 << 3) {
                spi.tfvi = spi.tfve = 0;
                stateChanged = true;
            }
            if ((spi.cr2 ^ value) & ~mask & (1 << 8 | 1 << 7 | 1 << 0)) {
                stateChanged = true;
            }
            value &= 0xF83;
            spi.cr2 &= mask;
            spi.cr2 |= value;
            break;
        case 0x10 >> 2: // INTCTRL
            value &= 0x1FFBF;
            spi.intCtrl &= mask;
            spi.intCtrl |= value;
            spi.intStatus &= ~(1 << 3 | 1 << 2);
            spi.intStatus |= spi_get_threshold_status();
            intrpt_set(INT_SPI, spi.intCtrl & spi.intStatus);
            break;
        case 0x18 >> 2: // DATA
            spi.dtr &= mask;
            spi.dtr |= value;
            if (!shift && spi.tfve != SPI_TXFIFO_DEPTH) {
                spi.txFifo[(spi.tfvi + spi.tfve++) & (SPI_TXFIFO_DEPTH - 1)] = spi.dtr;
                stateChanged = true;
            }
            break;
    }
    if (stateChanged) {
        spi_update();
    }
}

static const eZ80portrange_t pspi = {
    .read  = spi_read,