| 53 | } |
| 54 | |
| 55 | uint32_t flash_touch_cache(uint32_t addr) { |
| 56 | if (unlikely(++cpu.flashTotalAccesses == 0)) { |
| 57 | cpu.flashTotalAccesses = 0x80000000; |
| 58 | cpu.flashDelayCycles >>= 1; |
| 59 | } |
| 60 | uint32_t line = addr >> FLASH_CACHE_LINE_BITS; |
| 61 | if (likely(line == flash.lastCacheLine)) { |
| 62 | return 2; |
| 63 | } else { |
| 64 | flash.lastCacheLine = line; |
| 65 | flash_cache_set_t* set = &flash.cacheTags[line & (FLASH_CACHE_SETS - 1)]; |
| 66 | uint16_t tag = (uint16_t)(line >> FLASH_CACHE_SET_BITS); |
| 67 | if (likely(set->mru == tag)) { |
| 68 | cpu.flashDelayCycles++; |
| 69 | return 3; |
| 70 | } else if (likely(set->lru == tag)) { |
| 71 | /* Swap to track most-recently-used */ |
| 72 | set->lru = set->mru; |
| 73 | set->mru = tag; |
| 74 | cpu.flashDelayCycles++; |
| 75 | return 3; |
| 76 | } else { |
| 77 | /* Handle a cache miss by replacing least-recently-used */ |
| 78 | set->lru = set->mru; |
| 79 | set->mru = tag; |
| 80 | cpu.flashCacheMisses++; |
| 81 | /* Supposedly this takes from 195-201 cycles, but typically seems to be 196-197 */ |
| 82 | cpu.flashDelayCycles += 195; |
| 83 | return 197; |
| 84 | } |
| 85 | } |
| 86 | } |
| 87 | |
| 88 | static void flash_finish_command(void) { |
| 89 | flash.commandStatus[0] |= 1 << 0; |
no outgoing calls
no test coverage detected