| 116 | } |
| 117 | |
| 118 | static void flash_execute_command(void) { |
| 119 | flash_flush_cache(); |
| 120 | flash.commandAddress = flash.command[0] | flash.command[1] << 8 | flash.command[2] << 16; |
| 121 | flash.commandLength = flash.command[8] | flash.command[9] << 8 | flash.command[10] << 16; |
| 122 | flash.commandStatus[0] &= ~7; |
| 123 | switch (flash.command[0xF]) { |
| 124 | case 0x06: // Write Enable |
| 125 | flash.commandStatus[1] |= 1 << 1; |
| 126 | // fallthrough |
| 127 | case 0x04: // Write Disable |
| 128 | flash_finish_command(); |
| 129 | break; |
| 130 | case 0x94: // Read Manufacturer / Device ID Quad I/O |
| 131 | case 0x4B: // Read Unique ID Number |
| 132 | case 0x9F: // Read JEDEC ID |
| 133 | flash.commandAddress = 0; |
| 134 | // fallthrough |
| 135 | case 0x05: // Read Status Register-1 |
| 136 | case 0x35: // Read Status Register-2 |
| 137 | case 0x15: // Read Status Register-3 |
| 138 | flash.commandStatus[0] |= 1 << 2; |
| 139 | break; |
| 140 | case 0x32: // Quad Input Page Program |
| 141 | flash.commandStatus[0] |= 1 << 1; |
| 142 | break; |
| 143 | case 0x20: // Sector Erase |
| 144 | flash_erase(4 << 10); |
| 145 | break; |
| 146 | case 0x52: // 32KB Block Erase |
| 147 | flash_erase(32 << 10); |
| 148 | break; |
| 149 | case 0xD8: // 64KB Block Erase |
| 150 | flash_erase(64 << 10); |
| 151 | break; |
| 152 | case 0xC7: case 0x60: // Chip Erase |
| 153 | flash_erase(SIZE_FLASH); |
| 154 | break; |
| 155 | } |
| 156 | if (!flash.commandLength && flash.commandStatus[0] & 3 << 1) { |
| 157 | flash_finish_command(); |
| 158 | } |
| 159 | } |
| 160 | static uint8_t flash_read_command(bool peek) { |
| 161 | (void)peek; |
| 162 | switch (flash.command[0xF]) { |
no test coverage detected