| 4443 | // 10 = max wait |
| 4444 | |
| 4445 | static bool haltloop_do(int vsynctimeline, frame_time_t rpt_end, int lines) |
| 4446 | { |
| 4447 | int ovpos = vpos; |
| 4448 | while (lines-- >= 0) { |
| 4449 | ovpos = vpos; |
| 4450 | while (ovpos == vpos) { |
| 4451 | x_do_cycles(8 * CYCLE_UNIT); |
| 4452 | unset_special(SPCFLAG_UAEINT); |
| 4453 | check_uae_int_request(); |
| 4454 | #ifdef WITH_PPC |
| 4455 | ppc_interrupt(intlev()); |
| 4456 | uae_ppc_execute_check(); |
| 4457 | #endif |
| 4458 | if (regs.spcflags & SPCFLAG_CALLBACK) { |
| 4459 | unset_special(SPCFLAG_CALLBACK); |
| 4460 | device_call_main_thread_callbacks(); |
| 4461 | } |
| 4462 | if (regs.spcflags & (SPCFLAG_BRK | SPCFLAG_MODE_CHANGE)) { |
| 4463 | if (regs.spcflags & SPCFLAG_BRK) { |
| 4464 | unset_special(SPCFLAG_BRK); |
| 4465 | #ifdef DEBUGGER |
| 4466 | if (debugging) |
| 4467 | debug(); |
| 4468 | #endif |
| 4469 | } |
| 4470 | return true; |
| 4471 | } |
| 4472 | } |
| 4473 | |
| 4474 | // sync chipset with real time |
| 4475 | for (;;) { |
| 4476 | check_uae_int_request(); |
| 4477 | #ifdef WITH_PPC |
| 4478 | ppc_interrupt(intlev()); |
| 4479 | uae_ppc_execute_check(); |
| 4480 | #endif |
| 4481 | if (regs.spcflags & SPCFLAG_CALLBACK) { |
| 4482 | unset_special(SPCFLAG_CALLBACK); |
| 4483 | device_call_main_thread_callbacks(); |
| 4484 | } |
| 4485 | |
| 4486 | if (event_wait) |
| 4487 | break; |
| 4488 | frame_time_t d = read_processor_time() - rpt_end; |
| 4489 | if (d < -2 * vsynctimeline || d >= 0) |
| 4490 | break; |
| 4491 | } |
| 4492 | } |
| 4493 | return false; |
| 4494 | } |
| 4495 | |
| 4496 | static bool haltloop() |
| 4497 | { |
no test coverage detected