| 4685 | } |
| 4686 | |
| 4687 | void doint() |
| 4688 | { |
| 4689 | #ifdef WITH_PPC |
| 4690 | if (ppc_state) { |
| 4691 | if (!ppc_interrupt(intlev())) |
| 4692 | return; |
| 4693 | } |
| 4694 | #endif |
| 4695 | int ipl = intlev(); |
| 4696 | |
| 4697 | if (regs.ipl_pin != ipl) { |
| 4698 | |
| 4699 | // Paula does low to high IPL changes about 1.5 CPU clocks later than high to low. |
| 4700 | // -> CPU detects IPL change 1 CCK later if any IPL pin has high to low transition. |
| 4701 | // (In real world IPL is active low and delay is added if 0 to 1 transition) |
| 4702 | if (currprefs.cs_ipldelay && m68k_accurate_ipl && regs.ipl_pin >= 0 && ipl >= 0 && ( |
| 4703 | ((regs.ipl_pin & 1) && !(ipl & 1)) || |
| 4704 | ((regs.ipl_pin & 2) && !(ipl & 2)) || |
| 4705 | ((regs.ipl_pin & 4) && !(ipl & 4)) |
| 4706 | )) { |
| 4707 | event2_newevent_xx(-1, CYCLE_UNIT, ipl, doint_delayed); |
| 4708 | return; |
| 4709 | } |
| 4710 | |
| 4711 | update_ipl(ipl); |
| 4712 | } |
| 4713 | |
| 4714 | if (m68k_interrupt_delay) { |
| 4715 | if (!m68k_accurate_ipl && regs.ipl_pin > regs.intmask) { |
| 4716 | set_special(SPCFLAG_DOINT); |
| 4717 | } |
| 4718 | return; |
| 4719 | } |
| 4720 | |
| 4721 | if (regs.ipl_pin > regs.intmask || currprefs.cachesize) { |
| 4722 | if (currprefs.cpu_compatible && currprefs.cpu_model < 68020) |
| 4723 | set_special(SPCFLAG_INT); |
| 4724 | else |
| 4725 | set_special(SPCFLAG_DOINT); |
| 4726 | } |
| 4727 | } |
| 4728 | |
| 4729 | static void check_debugger() |
| 4730 | { |
no test coverage detected