| 8761 | } |
| 8762 | |
| 8763 | int mmu_init(int mode, uaecptr parm, uaecptr parm2) |
| 8764 | { |
| 8765 | uaecptr p, p2, banks; |
| 8766 | int size; |
| 8767 | struct mmudata *snptr; |
| 8768 | struct mmunode *mn; |
| 8769 | #ifdef JIT |
| 8770 | static int wasjit; |
| 8771 | if (currprefs.cachesize) { |
| 8772 | wasjit = currprefs.cachesize; |
| 8773 | changed_prefs.cachesize = 0; |
| 8774 | console_out (_T("MMU: JIT disabled\n")); |
| 8775 | check_prefs_changed_comp(false); |
| 8776 | } |
| 8777 | if (mode == 0) { |
| 8778 | if (mmu_enabled) { |
| 8779 | mmu_free (); |
| 8780 | deinitialize_memwatch (); |
| 8781 | console_out (_T("MMU: disabled\n")); |
| 8782 | changed_prefs.cachesize = wasjit; |
| 8783 | } |
| 8784 | mmu_logging = 0; |
| 8785 | return 1; |
| 8786 | } |
| 8787 | #endif |
| 8788 | |
| 8789 | if (mode == 1) { |
| 8790 | if (!mmu_enabled) |
| 8791 | return 0xffffffff; |
| 8792 | return mmu_struct; |
| 8793 | } |
| 8794 | |
| 8795 | p = parm; |
| 8796 | mmu_struct = p; |
| 8797 | if (get_long_debug (p) != 1) { |
| 8798 | console_out_f (_T("MMU: version mismatch %d <> %d\n"), get_long_debug (p), 1); |
| 8799 | return 0; |
| 8800 | } |
| 8801 | p += 4; |
| 8802 | mmu_logging = get_long_debug (p) & 1; |
| 8803 | p += 4; |
| 8804 | mmu_callback = get_long_debug (p); |
| 8805 | p += 4; |
| 8806 | mmu_regs = get_long_debug (p); |
| 8807 | p += 4; |
| 8808 | |
| 8809 | if (mode == 3) { |
| 8810 | int off; |
| 8811 | uaecptr addr = get_long_debug (parm2 + 4); |
| 8812 | if (!mmu_enabled) |
| 8813 | return 0; |
| 8814 | off = addr >> MMU_PAGE_SHIFT; |
| 8815 | mn = mmunl[off]; |
| 8816 | while (mn) { |
| 8817 | if (mn->mmubank->p_addr == parm2) { |
| 8818 | getmmubank(mn->mmubank, parm2); |
| 8819 | if (mmu_logging) |
| 8820 | console_out_f (_T("MMU: bank update %08X: %08X - %08X %08X\n"), |
no test coverage detected