| 9654 | } |
| 9655 | |
| 9656 | bool debug_sprintf(uaecptr addr, uae_u32 val, int size) |
| 9657 | { |
| 9658 | if (!currprefs.debug_mem) |
| 9659 | return false; |
| 9660 | |
| 9661 | uae_u32 v = val; |
| 9662 | if (size == sz_word && currprefs.cpu_model < 68020) { |
| 9663 | v &= 0xffff; |
| 9664 | if (!(addr & 2)) { |
| 9665 | debugsprintf_latch = v; |
| 9666 | debugsprintf_latched = 1; |
| 9667 | } else if (debugsprintf_latched) { |
| 9668 | v |= debugsprintf_latch << 16; |
| 9669 | size = sz_long; |
| 9670 | if (!(addr & 4) && debugsprintf_cnt > 0) { |
| 9671 | debugsprintf_cnt--; |
| 9672 | } |
| 9673 | } |
| 9674 | } |
| 9675 | if (size != sz_word) { |
| 9676 | debugsprintf_latched = 0; |
| 9677 | } |
| 9678 | if ((addr & (8 | 4)) == 4) { |
| 9679 | if (size != sz_long) |
| 9680 | return true; |
| 9681 | debug_sprintf_do(v); |
| 9682 | debugsprintf_cnt = 0; |
| 9683 | debugsprintf_latched = 0; |
| 9684 | debugsprintf_cycles = get_cycles(); |
| 9685 | debugsprintf_cycles_set = 1; |
| 9686 | } else if ((addr & (8 | 4)) == 8) { |
| 9687 | if (size != sz_long) |
| 9688 | return true; |
| 9689 | debugsprintf_va = val; |
| 9690 | debugsprintf_mode = 1; |
| 9691 | } else { |
| 9692 | if (debugsprintf_cnt < DEBUGSPRINTF_SIZE) { |
| 9693 | debugsprintf_stack[debugsprintf_cnt].val = v; |
| 9694 | debugsprintf_stack[debugsprintf_cnt].size = size; |
| 9695 | debugsprintf_cnt++; |
| 9696 | } |
| 9697 | debugsprintf_mode = 0; |
| 9698 | } |
| 9699 | return true; |
| 9700 | } |
no test coverage detected