| 1219 | } |
| 1220 | |
| 1221 | static void doexcstack2(void) |
| 1222 | { |
| 1223 | // generate exception but don't store it with test results |
| 1224 | |
| 1225 | int noac = noaccesshistory; |
| 1226 | int ta = testing_active; |
| 1227 | int cycs = cpu_cycles; |
| 1228 | noaccesshistory = 1; |
| 1229 | testing_active = -1; |
| 1230 | |
| 1231 | int opcode = (opcode_memory[0] << 8) | (opcode_memory[1]); |
| 1232 | if (test_exception_opcode >= 0) { |
| 1233 | opcode = test_exception_opcode; |
| 1234 | } |
| 1235 | if (flag_SPCFLAG_DOTRACE && test_exception == 9) { |
| 1236 | flag_SPCFLAG_DOTRACE = 0; |
| 1237 | } |
| 1238 | |
| 1239 | int sv = regs.s; |
| 1240 | uaecptr tmp = m68k_areg(regs, 7); |
| 1241 | m68k_areg(regs, 7) = test_memory_end + EXTRA_RESERVED_SPACE; |
| 1242 | if (cpu_lvl == 0) { |
| 1243 | if (test_exception == 2 || test_exception == 3) { |
| 1244 | uae_u16 mode = (sv ? 4 : 0) | test_exception_3_fc; |
| 1245 | mode |= test_exception_3_w ? 0 : 16; |
| 1246 | Exception_build_68000_address_error_stack_frame(mode, opcode, test_exception_addr, regs.pc); |
| 1247 | flag_SPCFLAG_DOTRACE = 0; |
| 1248 | } else { |
| 1249 | m68k_areg(regs, 7) -= 4; |
| 1250 | x_put_long(m68k_areg(regs, 7), regs.pc); |
| 1251 | m68k_areg(regs, 7) -= 2; |
| 1252 | x_put_word(m68k_areg(regs, 7), regs.sr); |
| 1253 | } |
| 1254 | } else if (cpu_lvl == 1) { |
| 1255 | if (test_exception == 2 || test_exception == 3) { |
| 1256 | uae_u16 ssw = (sv ? 4 : 0) | test_exception_3_fc; |
| 1257 | ssw |= test_exception_3_di > 0 ? 0x0000 : (test_exception_3_di < 0 ? (0x2000 | 0x1000) : 0x2000); |
| 1258 | ssw |= (!test_exception_3_w && test_exception_3_di) ? 0x1000 : 0x000; // DF |
| 1259 | ssw |= (test_exception_opcode & 0x10000) ? 0x0400 : 0x0000; // HB |
| 1260 | ssw |= test_exception_3_size == 0 ? 0x0200 : 0x0000; // BY |
| 1261 | ssw |= test_exception_3_w ? 0x0000 : 0x0100; // RW |
| 1262 | ssw |= (test_exception_opcode & 0x80000) ? 0x0800 : 0x0000; // RM |
| 1263 | regs.mmu_fault_addr = test_exception_addr; |
| 1264 | Exception_build_stack_frame(regs.instruction_pc, regs.pc, ssw, test_exception, 0x08); |
| 1265 | flag_SPCFLAG_DOTRACE = 0; |
| 1266 | } else { |
| 1267 | Exception_build_stack_frame_common(regs.instruction_pc, regs.pc, 0, test_exception, test_exception); |
| 1268 | } |
| 1269 | } else if (cpu_lvl == 2 || cpu_lvl == 3) { |
| 1270 | if (test_exception == 3) { |
| 1271 | uae_u16 ssw = (sv ? 4 : 0) | test_exception_3_fc; |
| 1272 | ssw |= 0x20; |
| 1273 | regs.mmu_fault_addr = test_exception_addr; |
| 1274 | Exception_build_stack_frame(regs.instruction_pc, regs.pc, ssw, test_exception, 0x0b); |
| 1275 | } else { |
| 1276 | Exception_build_stack_frame_common(regs.instruction_pc, regs.pc, 0, test_exception, test_exception); |
| 1277 | } |
| 1278 | } else { |
no test coverage detected