<strong>Pure Rust LLM Inference</strong>
<em>Universal Inference At Unimaginable Speeds</em>
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The foundation of any given field of science is philosophy. It is that which inspires direction, structure, and mission.
Atlas began as a solution to widely known problem in using other (python) inference engines built by data scientists: the code was steeped in a poly codebase with an ever shifting ecosystem of dependencies, patches, and cross-dependencies. One day your workaround for running a model works, the next day you have to update to a nightly branch of several dependencies and inject a new workaround. This is not how you build a software ecosystem; that's how you build a proof of concept. We thank the great and hard work data scientists made in proving LLMs can revolutionize our world, its economy, and how it challenges us to higher epochs. Now, the software engineers take the torch to turn a proof of concept into something that is designed to withstand the test of time.
Similar to how llama.cpp was built with the intent to prove you don't need $10000-$100000 GPUs to run LLMs, Atlas is built with the intent to consistently force the narrative that as hardware continues to advance, we should not have to pay premium Cloud API prices for inference. Atlas, by virtue of its philosophy, maximizes speed for each hardware/model combination, thus paving the way for meaningfully powerful and intelligent LLMs to be run locally in such a way the model is truly useful.
We promised this since the beginning. We believe great software comes from opening the source, not from just keeping it closed. The more eyes, the better. And therein brings us to the next point.
For those who've followed us this far since the inception of our Discord, you know the extent to which our commitment to the community is, according to one user humourously put, "cracked". We want to build something incredible, and that means we not only build for you, but you, now having access to the source code, can now build for others in ways that triumph over existing solutions. This is the only way we all win. We are the Pirates of the inference space.
We chose a monorepo design to ensure that, as we head further into the agentic age of coding, the average data scientist or engineer can contribute meaningful PRs to any part of the system. Eventually, since this is a monorepo, there will be a day where the repo is autonomously self-improving and self-patching. This is most efficient and most effective when all the code is in one place, not many.
We make no compromises or generalizations. Each hardware and model combination has its own unique properties that require fine-tuning custom kernels that leverage the model for that specific hardware configuration. The end result? 2-3x faster kernels all around.
It took a significant amount of time to build this codebase. We also know people will want to submit AI-generated PRs. We can't stop you, and in fact, given SOTA, you might just have to! The good news is that this codebase was built with enough railguards, structure, and abstraction to guide your AI to absorb the entire monorepo and contribute meaningfully. There's enough context to keep this going off the rails like a crazy train.This means ultimately that instead of waiting for days to weeks before getting model support, you can just fork this repo, and ask your AI to integrate it, then within hours you'll more likely than not have a working model running. We will not be condescending, unlike some other inference engines out there when good-faith PRs that simply work are posted. We are not stymied by bureacracy, and want to enable the community to rapidly expand this monorepo ecosystem safely and effectively.
Arxiv is getting countless papers published every day on AI. Nobody can keep up. Yet, some papers may be relevant to this project, others may not. Research endeavors to improve quality, alignment, and speed ought to be considered by our community as something we can integrate cleanly. Feel free to open a PoC PR here and just explain what you did and why, and how it works.
Our system is modular, with tight abstraction boundaries and trait requirements that force the architecture to take on a certain form. This form is designed to prevent pigeon-holing the project into the wrong direction. The business logic is the same across all hardware/model combinations, just the concrete implementations differ.
The diagram below shows how a single HTTP request flows from the API surface down to hardware-specific CUDA kernel execution. Dashed borders mark the plug-and-play abstraction boundaries — the traits and registries where a new hardware target, model family, communication backend, or storage backend plugs in without touching the layers above or below it.
flowchart TB
%% ── Colours & styles ──────────────────────────────────────────────
classDef server fill:#2d6a4f,stroke:#1b4332,color:#d8f3dc
classDef scheduler fill:#1e6091,stroke:#184e77,color:#d9ed92
classDef model fill:#b5179e,stroke:#7209b7,color:#ffe5fc
classDef layer fill:#7209b7,stroke:#560bad,color:#ffd6ff
classDef kernel fill:#f48c06,stroke:#dc2f02,color:#fff
classDef storage fill:#264653,stroke:#1d3557,color:#a8dadc
classDef comm fill:#3a86ff,stroke:#1d3557,color:#fff
classDef trait stroke-dasharray: 6 4,stroke-width:2px
%% ── Top layer: HTTP API ───────────────────────────────────────────
HTTP["HTTP Server (spark-server)
OpenAI · Anthropic · Responses"]:::server
SCHED["Scheduler
batches, MTP verify, KV alloc"]:::scheduler
HTTP --> SCHED
%% ── Model abstraction (plug-in #1) ────────────────────────────────
subgraph MODEL ["🔌 trait Model"]
direction TB
TRANSFORMER["TransformerModel
generic prefill/decode loop"]:::model
end
class MODEL trait
SCHED --> MODEL
%% ── Weight loader abstraction (plug-in #2) ────────────────────────
subgraph LOADER ["🔌 trait ModelWeightLoader"]
direction LR
QW35["Qwen3.5
27B/35B/122B"]:::layer
QW36["Qwen3.6
35B-A3B"]:::layer
QWNEXT["Qwen3-Next
80B-A3B"]:::layer
QWVL["Qwen3-VL
30B-A3B"]:::layer
GEMMA["Gemma-4
26B/31B"]:::layer
MISTRAL["Mistral-Small-4
119B"]:::layer
MINIMAX["MiniMax M2.7
229B-A10B"]:::layer
NEMO["Nemotron-3
Nano/Super"]:::layer
end
class LOADER trait
TRANSFORMER --> LOADER
%% ── Layer trait (plug-in #3) ──────────────────────────────────────
subgraph LAYERS ["🔌 trait TransformerLayer"]
direction LR
ATTN["Attention
(GQA, MLA, sliding)"]:::layer
SSM["SSM
(Mamba-2, GDN)"]:::layer
MOE["MoE
(routed + shared)"]:::layer
FFN["Dense FFN
(GeGLU, SwiGLU)"]:::layer
MTP["MTP Head
(draft proposer)"]:::layer
end
class LAYERS trait
LOADER --> LAYERS
%% ── GPU backend (plug-in #4) ──────────────────────────────────────
subgraph GPU ["🔌 trait GpuBackend"]
direction LR
CUDA["CUDA backend
(GB10 / Blackwell)"]:::kernel
AMD["AMD ROCm
(future)"]:::kernel
APPLE["Apple Metal
(future)"]:::kernel
end
class GPU trait
LAYERS --> GPU
%% ── Kernel registry (plug-in #5) ──────────────────────────────────
subgraph KERNELS ["🔌 kernels/<hw>/<model>/<quant>/ — auto-discovered"]
direction LR
K_GB10["gb10/qwen3.5-35b-a3b/nvfp4
+ 11 other targets"]:::kernel
end
class KERNELS trait
CUDA --> KERNELS
%% ── EP / multi-GPU (plug-in #6) ───────────────────────────────────
subgraph EP ["🔌 trait CommBackend"]
direction LR
NCCL["NCCL
(EP=2, all-reduce)"]:::comm
end
class EP trait
LAYERS -.-> EP
%% ── Storage backend (plug-in #7) ──────────────────────────────────
subgraph STORE ["🔌 trait StorageBackend"]
direction LR
IORING["io_uring
(NVMe KV offload)"]:::storage
end
class STORE trait
SCHED -.-> STORE
%% ── Cross-references ──────────────────────────────────────────────
KERNELS -. "kernels selected by
(hardware × model × quant)
at build time" .-> CUDA
Solid boxes are concrete implementations. Dashed borders with 🔌 are the trait-based abstraction boundaries — each is a Rust trait (or a filesystem convention for kernels) where a new integration plugs in:
| Plug Point | What It Abstracts | To Add New Support |
|---|---|---|
trait Model |
Full model forward pass | Rarely needed — the existing TransformerModel handles all architectures via composable layers |
trait ModelWeightLoader |
HuggingFace → layer translation | Implement one struct with weight-name patterns for your model family (factory.rs adds one match arm) |
trait TransformerLayer |
Per-layer compute (attn, SSM, MoE, FFN) | Compose existing layer types or implement a new one for novel architectures |
trait GpuBackend |
All GPU memory and kernel ops | Swap the CUDA driver for another accelerator backend |
kernels/<hw>/<model>/<quant>/ |
Hardware-tuned CUDA kernels | Drop a new directory with MODEL.toml + .cu files; build.rs auto-discovers it |
trait CommBackend |
Multi-GPU collective communication | Implement for MPI, GDR, or custom interconnects |
trait StorageBackend |
NVMe KV-cache offload I/O | Implement for CXL, RDMA, or other storage tiers |
spark-server receives OpenAI/Anthropic requests, tokenizes, and enqueuesembed → [layer₀ … layerₙ] → norm → lm_headGpuBackend to launch kernels from AtlasRegistry(hardware × model × quant) target at build timeCommBackend handles cross-GPU all-reduce after MoE expert computationStorageBackend spills/restores KV blocks to NVMe for long-context sequencesWe have to walk before we can run. Today's Atlas is targeted at a single hardware platform — NVIDIA's GB10 (DGX Spark, SM121) — and fifteen hand-tuned (Hardware × Model × Quantization) targets. Every supported model below runs off one multi-model binary; the right kernel set is selected at startup from the model's config.json. No swapping images, no rebuilding, no per-model magic — just point Atlas at a HuggingFace ID.
| Family | Model | HuggingFace ID | Params / active | Architecture |
|---|---|---|---|---|
| Qwen3.5 | Qwen3.5-27B | Kbenkhaled/Qwen3.5-27B-NVFP4 |
27B dense | Hybrid SSM + attention, dense FFN, MRoPE |
| Qwen3.5 | Qwen3.5-35B-A3B | Sehyo/Qwen3.5-35B-A3B-NVFP4 |
35B / 3B | GDN + attention + MoE, MTP |
| Qwen3.5 | Qwen3.5-122B-A10B | `S |
$ claude mcp add atlas \
-- python -m otcore.mcp_server <graph>