* @brief Enables the Event Output. * @retval None */

* @brief This function handles EXTI interrupt request. * @param GPIO_Pin: Specifies the pins connected EXTI line * @retval None */

* @brief Locks GPIO Pins configuration registers. * @note The locking mechanism allows the IO configuration to be frozen. When the LOCK sequence *

* @brief Toggles the specified GPIO pin * @param GPIOx: where x can be (A..G depending on device used) to select the GPIO peripheral * @param G

* @brief Returns the device identifier. * Note: On devices STM32F10xx8 and STM32F10xxB, * STM32F101xC/D/E and STM32F103xC/D/E,

* @brief Returns the HAL revision * @retval version 0xXYZR (8bits for each decimal, R for RC) */

* @brief Returns the device revision identifier. * Note: On devices STM32F10xx8 and STM32F10xxB, * STM32F101xC/D/E and STM32F103x

* @brief Return tick frequency. * @retval Tick frequency. * Value of @ref HAL_TickFreqTypeDef. */

* @brief This function returns a tick priority. * @retval tick priority */

* @brief Returns first word of the unique device identifier (UID based on 96 bits) * @retval Device identifier */

* @brief Returns second word of the unique device identifier (UID based on 96 bits) * @retval Device identifier */

* @brief Returns third word of the unique device identifier (UID based on 96 bits) * @retval Device identifier */

* @brief Initializes and configures the Region and the memory to be protected. * @param MPU_Init: Pointer to a MPU_Region_InitTypeDef structure th

* @brief Disables the MPU * @retval None */

* @brief Enable the MPU. * @param MPU_Control: Specifies the control mode of the MPU during hard fault, * NMI, FAULTMASK and privilege

USER CODE END 0 */ * Initializes the Global MSP. */

* @brief Clears the pending bit of an external interrupt. * @param IRQn External interrupt number. * This parameter can be an enumerator

* @brief Gets active interrupt ( reads the active register in NVIC and returns the active bit). * @param IRQn External interrupt number *

* @brief Gets Pending Interrupt (reads the pending register in the NVIC * and returns the pending bit for the specified interrupt). * @p

* @brief Gets the priority of an interrupt. * @param IRQn: External interrupt number. * This parameter can be an enumerator of IRQn_Type

* @brief Gets the priority grouping field from the NVIC Interrupt Controller. * @retval Priority grouping field (SCB->AIRCR [10:8] PRIGROUP field)

* @brief Sets Pending bit of an external interrupt. * @param IRQn External interrupt number * This parameter can be an enumerator of IRQ

* @brief Configures the voltage threshold detected by the Power Voltage Detector(PVD). * @param sConfigPVD: pointer to an PWR_PVDTypeDef structure

* @brief Deinitializes the PWR peripheral registers to their default reset values. * @retval None */

* @brief Disables access to the backup domain (RTC registers, RTC * backup data registers). * @note If the HSE divided by 128 is used a

* @brief Disables the Power Voltage Detector(PVD). * @retval None */

* @brief Disables CORTEX M3 SEVONPEND bit. * @note Clears SEVONPEND bit of SCR register. When this bit is set, this causes * WFE to wake u

* @brief Disables Sleep-On-Exit feature when returning from Handler mode to Thread mode. * @note Clears SLEEPONEXIT bit of SCR register. When this

* @brief Disables the WakeUp PINx functionality. * @param WakeUpPinx: Specifies the Power Wake-Up pin to disable. * This parameter can be o

* @brief Enables access to the backup domain (RTC registers, RTC * backup data registers ). * @note If the HSE divided by 128 is used a

* @brief Enables the Power Voltage Detector(PVD). * @retval None */

* @brief Enables CORTEX M3 SEVONPEND bit. * @note Sets SEVONPEND bit of SCR register. When this bit is set, this causes * WFE to wake up w

* @brief Indicates Sleep-On-Exit when returning from Handler mode to Thread mode. * @note Set SLEEPONEXIT bit of SCR register. When this bit is set

* @brief Enables the WakeUp PINx functionality. * @param WakeUpPinx: Specifies the Power Wake-Up pin to enable. * This parameter can be one

* @brief Enters Sleep mode. * @note In Sleep mode, all I/O pins keep the same state as in Run mode. * @param Regulator: Regulator state as no eff

* @brief Enters Standby mode. * @note In Standby mode, all I/O pins are high impedance except for: * - Reset pad (still available) *

* @brief Enters Stop mode. * @note In Stop mode, all I/O pins keep the same state as in Run mode. * @note When exiting Stop mode by using an in

* @brief This function handles the PWR PVD interrupt request. * @note This API should be called under the PVD_IRQHandler(). * @retval None */

* @brief Disable PLL2 * @note PLL2 is not disabled if used indirectly as system clock. * @retval HAL status */

* @brief Disable PLLI2S * @note PLLI2S is not disabled if used by I2S2 or I2S3 Interface. * @retval HAL status */

* @brief Enable PLL2 * @param PLL2Init pointer to an RCC_PLL2InitTypeDef structure that * contains the configuration information for the

* @brief Enable PLLI2S * @param PLLI2SInit pointer to an RCC_PLLI2SInitTypeDef structure that * contains the configuration information f

* @brief Get the PeriphClkInit according to the internal * RCC configuration registers. * @param PeriphClkInit pointer to an RCC_PeriphCLKInitTy

* @brief Resets the RCC clock configuration to the default reset state. * @note The default reset state of the clock configuration is given below

* @brief Disables the Clock Security System. * @retval None */

* @brief Enables the Clock Security System. * @note If a failure is detected on the HSE oscillator clock, this oscillator * is automati

* @brief Get the RCC_ClkInitStruct according to the internal * RCC configuration registers. * @param RCC_ClkInitStruct pointer to an RCC_ClkInit

* @brief Configures the RCC_OscInitStruct according to the internal * RCC configuration registers. * @param RCC_OscInitStruct pointer to an RCC_

* @brief Returns the PCLK1 frequency * @note Each time PCLK1 changes, this function must be called to update the * right PCLK1 value. O

* @brief Selects the clock source to output on MCO pin. * @note MCO pin should be configured in alternate function mode. * @param RCC_MCOx spe

* @brief This function handles the RCC CSS interrupt request. * @note This API should be called under the NMI_Handler(). * @retval None */

* @brief Resume Tick increment. * @note In the default implementation , SysTick timer is the source of time base. It is * used to generate i

* @brief Abort ongoing transfer (blocking mode). * @param hspi SPI handle. * @note This procedure could be used for aborting any ongoing trans

* @brief Abort ongoing transfer (Interrupt mode). * @param hspi SPI handle. * @note This procedure could be used for aborting any ongoing tran

* @brief Pause the DMA Transfer. * @param hspi pointer to a SPI_HandleTypeDef structure that contains * the configuration informat

* @brief Resume the DMA Transfer. * @param hspi pointer to a SPI_HandleTypeDef structure that contains * the configuration informa

* @brief Stop the DMA Transfer. * @param hspi pointer to a SPI_HandleTypeDef structure that contains * the configuration informati

* @brief De-Initialize the SPI peripheral. * @param hspi pointer to a SPI_HandleTypeDef structure that contains * the configuratio

* @brief Return the SPI error code. * @param hspi pointer to a SPI_HandleTypeDef structure that contains * the configuration infor

* @brief Return the SPI handle state. * @param hspi pointer to a SPI_HandleTypeDef structure that contains * the configuration inf

* @brief Receive an amount of data in blocking mode. * @param hspi pointer to a SPI_HandleTypeDef structure that contains * the co

* @brief Receive an amount of data in non-blocking mode with DMA. * @note In case of MASTER mode and SPI_DIRECTION_2LINES direction, hdmatx shall

* @brief Receive an amount of data in non-blocking mode with Interrupt. * @param hspi pointer to a SPI_HandleTypeDef structure that contains *

* @brief Register a User SPI Callback * To be used instead of the weak predefined callback * @param hspi Pointer to a SPI_HandleTypeDef

* @brief Transmit an amount of data in blocking mode. * @param hspi pointer to a SPI_HandleTypeDef structure that contains * the c

* @brief Transmit an amount of data in non-blocking mode with Interrupt. * @param hspi pointer to a SPI_HandleTypeDef structure that contains *

* @brief Unregister an SPI Callback * SPI callback is redirected to the weak predefined callback * @param hspi Pointer to a SPI_HandleTy

* @brief Configures the SysTick clock source. * @param CLKSource: specifies the SysTick clock source. * This parameter can be one of the

* @brief This function handles SYSTICK interrupt request. * @retval None */

* @brief Set new tick Freq. * @retval status */

* @brief Suspend Tick increment. * @note In the default implementation , SysTick timer is the source of time base. It is * used to generate

* @brief Configures the Break feature, dead time, Lock level, OSSI/OSSR State * and the AOE(automatic output enable). * @param htim TIM

* @brief Configure the TIM commutation event sequence. * @note This function is mandatory to use the commutation event in order to * upda

* @brief Configure the TIM commutation event sequence with DMA. * @note This function is mandatory to use the commutation event in order to *

* @brief Configure the TIM commutation event sequence with interrupt. * @note This function is mandatory to use the commutation event in order to

* @brief Return actual state of the TIM complementary channel. * @param htim TIM handle * @param ChannelN TIM Complementary channel *

* @brief DeInitializes the TIM Hall Sensor interface * @param htim TIM Hall Sensor Interface handle * @retval HAL status */

* @brief Return the TIM Hall Sensor interface handle state. * @param htim TIM Hall Sensor handle * @retval HAL state */

@defgroup TIMEx_Exported_Functions_Group1 Extended Timer Hall Sensor functions * @brief Timer Hall Sensor functions * @verbatim =============

* @brief Starts the TIM Hall Sensor Interface. * @param htim TIM Hall Sensor Interface handle * @retval HAL status */

* @brief Starts the TIM Hall Sensor Interface in DMA mode. * @param htim TIM Hall Sensor Interface handle * @param pData The destination Buffer

* @brief Starts the TIM Hall Sensor Interface in interrupt mode. * @param htim TIM Hall Sensor Interface handle * @retval HAL status */

* @brief Stops the TIM Hall sensor Interface. * @param htim TIM Hall Sensor Interface handle * @retval HAL status */

* @brief Stops the TIM Hall Sensor Interface in DMA mode. * @param htim TIM Hall Sensor Interface handle * @retval HAL status */

* @brief Stops the TIM Hall Sensor Interface in interrupt mode. * @param htim TIM Hall Sensor Interface handle * @retval HAL status */

* @brief Configures the TIM in master mode. * @param htim TIM handle. * @param sMasterConfig pointer to a TIM_MasterConfigTypeDef structure tha

* @brief Starts the TIM Output Compare signal generation on the complementary * output. * @param htim TIM Output Compare handle * @par

* @brief Starts the TIM Output Compare signal generation in DMA mode * on the complementary output. * @param htim TIM Output Compare han

* @brief Starts the TIM Output Compare signal generation in interrupt mode * on the complementary output. * @param htim TIM OC handle

* @brief Stops the TIM Output Compare signal generation on the complementary * output. * @param htim TIM handle * @param Channel TIM

* @brief Stops the TIM Output Compare signal generation in DMA mode * on the complementary output. * @param htim TIM Output Compare hand

* @brief Stops the TIM Output Compare signal generation in interrupt mode * on the complementary output. * @param htim TIM Output Compar

* @brief Starts the TIM One Pulse signal generation on the complementary * output. * @note OutputChannel must match the pulse output chan

* @brief Starts the TIM One Pulse signal generation in interrupt mode on the * complementary channel. * @note OutputChannel must match th

* @brief Stops the TIM One Pulse signal generation on the complementary * output. * @note OutputChannel must match the pulse output chann

* @brief Stops the TIM One Pulse signal generation in interrupt mode on the * complementary channel. * @note OutputChannel must match the

* @brief Starts the PWM signal generation on the complementary output. * @param htim TIM handle * @param Channel TIM Channel to be enabled *

* @brief Starts the TIM PWM signal generation in DMA mode on the * complementary output * @param htim TIM handle * @param Channel TIM