| 400 | //=========================================================================== |
| 401 | |
| 402 | BYTE __stdcall CSuperSerialCard::SSC_IORead(WORD PC, WORD uAddr, BYTE bWrite, BYTE uValue, ULONG nExecutedCycles) |
| 403 | { |
| 404 | UINT uSlot = ((uAddr & 0xff) >> 4) - 8; |
| 405 | CSuperSerialCard* pSSC = (CSuperSerialCard*) MemGetSlotParameters(uSlot); |
| 406 | |
| 407 | switch (uAddr & 0xf) |
| 408 | { |
| 409 | case 0x0: return IO_Null(PC, uAddr, bWrite, uValue, nExecutedCycles); |
| 410 | case 0x1: return pSSC->CommDipSw(PC, uAddr, bWrite, uValue, nExecutedCycles); |
| 411 | case 0x2: return pSSC->CommDipSw(PC, uAddr, bWrite, uValue, nExecutedCycles); |
| 412 | case 0x3: return IO_Null(PC, uAddr, bWrite, uValue, nExecutedCycles); |
| 413 | case 0x4: return IO_Null(PC, uAddr, bWrite, uValue, nExecutedCycles); |
| 414 | case 0x5: return IO_Null(PC, uAddr, bWrite, uValue, nExecutedCycles); |
| 415 | case 0x6: return IO_Null(PC, uAddr, bWrite, uValue, nExecutedCycles); |
| 416 | case 0x7: return IO_Null(PC, uAddr, bWrite, uValue, nExecutedCycles); |
| 417 | case 0x8: return pSSC->CommReceive(PC, uAddr, bWrite, uValue, nExecutedCycles); |
| 418 | case 0x9: return pSSC->CommStatus(PC, uAddr, bWrite, uValue, nExecutedCycles); |
| 419 | case 0xA: return pSSC->CommCommand(PC, uAddr, bWrite, uValue, nExecutedCycles); |
| 420 | case 0xB: return pSSC->CommControl(PC, uAddr, bWrite, uValue, nExecutedCycles); |
| 421 | case 0xC: return IO_Null(PC, uAddr, bWrite, uValue, nExecutedCycles); |
| 422 | case 0xD: return IO_Null(PC, uAddr, bWrite, uValue, nExecutedCycles); |
| 423 | case 0xE: return IO_Null(PC, uAddr, bWrite, uValue, nExecutedCycles); |
| 424 | case 0xF: return IO_Null(PC, uAddr, bWrite, uValue, nExecutedCycles); |
| 425 | } |
| 426 | |
| 427 | return 0; |
| 428 | } |
| 429 | |
| 430 | BYTE __stdcall CSuperSerialCard::SSC_IOWrite(WORD PC, WORD uAddr, BYTE bWrite, BYTE uValue, ULONG nExecutedCycles) |
| 431 | { |
nothing calls this directly
no test coverage detected