* \brief Function reads RF register. * * \param addr Address on the RF * * \return Read register data */

/ * @brief * Wait for an ongoing sync of register(s) to low-frequency domain to complete. * * @param[in] mask * A bitmask corresponding to SYN

Get the numbers of segments on the ooseq list */

* @ingroup udp_raw * Bind an UDP PCB. * * @param pcb UDP PCB to be bound with a local address ipaddr and port. * @param ipaddr local IP address t

! \brief get USART interrupt and flag status \param[in] usart_periph: USARTx(x=0,1,2,5)/UARTx(x=3,4,6,7) \param[in] int_flag: USART

* @brief This function set selected module clock source and module clock divider * @param[in] u32ModuleIdx is module index. * @param[in] u3

Get MAIN Clk */ ! brief Return Frequency of Core System * return Frequency of Core System */

/ * @brief * Configure wait state settings necessary to switch to a given core clock * frequency at a certain voltage scale level. * * @detail

* Function Name: Cy_Crypto_Core_EC_SubMod ****************************************************************************/ * * Modular subtraction in GF(

* @brief Handle FMPSMBUSx communication when starting transfer or during transfer (TC or TCR flag are set). * @param hfmpsmbus FMPSMBUS handle.

* @brief Input FIFO transfer completed callback. * @param hcryp pointer to a CRYP_HandleTypeDef structure that contains * the configurat

* @brief Input FIFO transfer completed callback. * @param hcryp pointer to a CRYP_HandleTypeDef structure that contains * the configurat

* @brief Input FIFO transfer completed callback. * @param hcryp pointer to a CRYP_HandleTypeDef structure that contains * the configurat

* @brief Returns the PLL2 clock frequencies :PLL2_P_Frequency,PLL2_R_Frequency and PLL2_Q_Frequency * @note The PLL2 clock frequencies computed b

* @brief Get ADC group injected conversion state. * @rmtoll CR JADSTART LL_ADC_INJ_IsConversionOngoing * @param ADCx ADC instance

* @brief Check if HSI clock is ready * @rmtoll CR HSIRDY LL_RCC_HSI_IsReady * @retval State of bit (1 or 0). */

* @brief Indicate if USART is enabled * @rmtoll CR1 UE LL_USART_IsEnabled * @param USARTx USART Instance * @retval State o

/ ! * \brief Increment reset delay counter. */ /

Public function, see header qcbor.h file */

* @brief Return SYSTEM clock (SYSCLK) frequency * @retval SYSTEM clock frequency (in Hz) */

* @brief Return the response received from the card for the last command * @param SDIOx: Pointer to SDMMC register base * @param Response:

* @brief Handle SMBUSx communication when starting transfer or during transfer (TC or TCR flag are set). * @param hsmbus SMBUS handle. * @param

* @brief Handle SMBUSx communication when starting transfer or during transfer (TC or TCR flag are set). * @param hsmbus SMBUS handle. * @param

* @brief Handle SMBUSx communication when starting transfer or during transfer (TC or TCR flag are set). * @param hsmbus SMBUS handle. * @param

* @brief Handle SMBUSx communication when starting transfer or during transfer (TC or TCR flag are set). * @param hsmbus SMBUS handle. * @param

* @brief Handle SMBUSx communication when starting transfer or during transfer (TC or TCR flag are set). * @param hsmbus SMBUS handle. * @param

* @brief Handle SMBUSx communication when starting transfer or during transfer (TC or TCR flag are set). * @param hsmbus SMBUS handle. * @param

* @brief Handle SMBUSx communication when starting transfer or during transfer (TC or TCR flag are set). * @param hsmbus SMBUS handle. * @param

* @brief Handle SMBUSx communication when starting transfer or during transfer (TC or TCR flag are set). * @param hsmbus SMBUS handle. * @param

* @brief Handle SMBUSx communication when starting transfer or during transfer (TC or TCR flag are set). * @param hsmbus SMBUS handle. * @param

* @brief Handle SMBUSx communication when starting transfer or during transfer (TC or TCR flag are set). * @param hsmbus SMBUS handle. * @param

* @brief Handle SMBUSx communication when starting transfer or during transfer (TC or TCR flag are set). * @param hsmbus SMBUS handle. * @param

* @brief Enable register write-protection function * @param None * @return None * @details This function is used to enable regi

/ * @brief * Clear one or more pending USART interrupts. * * @param[in] usart * Pointer to USART/UART peripheral register block. * * @param[

! * @brief Handle the common class callback. * * This function handles the common class callback. * * @param handle The device handle, g

* @brief Halt a host channel * @param USBx Selected device * @param hc_num Host Channel number * This parameter can be a value from

* @brief Halt a host channel * @param USBx Selected device * @param hc_num Host Channel number * This parameter can be a value from

* @brief Halt a host channel * @param USBx Selected device * @param hc_num Host Channel number * This parameter can be a value from

* @brief Halt a host channel * @param USBx Selected device * @param hc_num Host Channel number * This parameter can be a value from

* @brief Halt a host channel * @param USBx Selected device * @param hc_num Host Channel number * This parameter can be a value from

* @brief Halt a host channel * @param USBx Selected device * @param hc_num Host Channel number * This parameter can be a value from

* @brief Halt a host channel * @param USBx Selected device * @param hc_num Host Channel number * This parameter can be a value from

/ ! * \brief Start a timer in units of seconds. * * \param pTimer Pointer to timer. * \param sec Seconds until expiration. */ /

\brief Enable IRQ Interrupts \details Enables IRQ interrupts by clearing special-purpose register PRIMASK. Can only be executed in Priv

Read 8-bit value from buffer reader and advance read posiion * \param pBuf the buffer to read from * \return 8-bit value read */

* @ingroup altcp * @see tcp_close() */

/ ! * \brief Get an EATT connection control block. * * \param connId DM connection identifier. * * \return Pointer to control block. */ /

Find an OUT and IN endpoint pair. Raise a RuntimeError if any endpoint could not be found or wMaxPacketSize is not equal for both endpoints.

! * @brief Flash Command Sequence * * This function is used to perform the command write sequence to the flash. * * @param driver Pointer to stor

! * @brief Flash Command Sequence * * This function is used to perform the command write sequence to the flash. * * @param driver Pointer to stor

! * @brief Flash Command Sequence * * This function is used to perform the command write sequence to the flash. * * @param driver Pointer to stor

! * @brief Flash Command Sequence * * This function is used to perform the command write sequence to the flash. * * @param driver Pointer to stor

! * @brief Flash Command Sequence * * This function is used to perform the command write sequence to the flash. * * @param driver Pointer to stor

! * @brief Flash Command Sequence * * This function is used to perform the command write sequence to the flash. * * @param driver Pointer to stor

* Get the characteristic's value attribute handle in the ATT table. * * @return The value attribute handle. * * @note The underlyi

\brief Attempt to read a packet from the EMAC interface. * * \param[in] idx index of packet to be read */

/ ! * \brief Return the next CIS context after the current CIS context in the linked list. * * \param pList Pointer to the list.