* @brief Data type for 4-wide floats. */
| 53 | * @brief Data type for 4-wide floats. |
| 54 | */ |
| 55 | struct vfloat4 |
| 56 | { |
| 57 | /** |
| 58 | * @brief Construct from zero-initialized value. |
| 59 | */ |
| 60 | ASTCENC_SIMD_INLINE vfloat4() = default; |
| 61 | |
| 62 | /** |
| 63 | * @brief Construct from 4 values loaded from an unaligned address. |
| 64 | * |
| 65 | * Consider using loada() which is better with wider VLA vectors if data is |
| 66 | * aligned to vector length. |
| 67 | */ |
| 68 | ASTCENC_SIMD_INLINE explicit vfloat4(const float* p) |
| 69 | { |
| 70 | m[0] = p[0]; |
| 71 | m[1] = p[1]; |
| 72 | m[2] = p[2]; |
| 73 | m[3] = p[3]; |
| 74 | } |
| 75 | |
| 76 | /** |
| 77 | * @brief Construct from 4 scalar values replicated across all lanes. |
| 78 | * |
| 79 | * Consider using zero() for constexpr zeros. |
| 80 | */ |
| 81 | ASTCENC_SIMD_INLINE explicit vfloat4(float a) |
| 82 | { |
| 83 | m[0] = a; |
| 84 | m[1] = a; |
| 85 | m[2] = a; |
| 86 | m[3] = a; |
| 87 | } |
| 88 | |
| 89 | /** |
| 90 | * @brief Construct from 4 scalar values. |
| 91 | * |
| 92 | * The value of @c a is stored to lane 0 (LSB) in the SIMD register. |
| 93 | */ |
| 94 | ASTCENC_SIMD_INLINE explicit vfloat4(float a, float b, float c, float d) |
| 95 | { |
| 96 | m[0] = a; |
| 97 | m[1] = b; |
| 98 | m[2] = c; |
| 99 | m[3] = d; |
| 100 | } |
| 101 | |
| 102 | /** |
| 103 | * @brief Get the scalar value of a single lane. |
| 104 | */ |
| 105 | template <int l> ASTCENC_SIMD_INLINE float lane() const |
| 106 | { |
| 107 | return m[l]; |
| 108 | } |
| 109 | |
| 110 | /** |
| 111 | * @brief Set the scalar value of a single lane. |
| 112 | */ |
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