| 60 | } // namespace |
| 61 | |
| 62 | void ClIndirectConv2d::configure(const CLCompileContext &compile_context, |
| 63 | ITensorInfo *src, |
| 64 | ITensorInfo *weights, |
| 65 | ITensorInfo *biases, |
| 66 | ITensorInfo *dst, |
| 67 | const PadStrideInfo &conv_info, |
| 68 | const ActivationLayerInfo &act_info) |
| 69 | { |
| 70 | ARM_COMPUTE_ERROR_ON_NULLPTR(src); |
| 71 | ARM_COMPUTE_LOG_PARAMS(src, weights, biases, dst, conv_info, act_info); |
| 72 | |
| 73 | // Reuse the direct convolution descriptor |
| 74 | const DirectConvComputeKernelInfo desc = config_indirect_convolution_nhwc(src, weights, conv_info); |
| 75 | |
| 76 | // Configure indirect convolution kernels |
| 77 | auto k0 = std::make_unique<kernels::ClIndirectConv2dAddressPrecalculationKernel>(); |
| 78 | auto k1 = std::make_unique<kernels::ClIndirectConv2dKernel>(); |
| 79 | |
| 80 | k0->set_target(CLScheduler::get().target()); |
| 81 | k1->set_target(CLScheduler::get().target()); |
| 82 | |
| 83 | k0->configure(compile_context, src, weights, &_indirect_buffer, conv_info, desc); |
| 84 | k1->configure(compile_context, src, weights, biases, &_indirect_buffer, dst, conv_info, act_info, desc); |
| 85 | |
| 86 | _addr_precalculation_kernel = std::move(k0); |
| 87 | _indirect_conv_kernel = std::move(k1); |
| 88 | _is_prepared = false; |
| 89 | |
| 90 | // Tune kernels |
| 91 | CLScheduler::get().tune_kernel_static(*_indirect_conv_kernel); |
| 92 | |
| 93 | // Request memory for the indirect buffer |
| 94 | _aux_mem[IndirectBuffer] = |
| 95 | MemoryInfo(offset_int_vec(IndirectBuffer), MemoryLifetime::Persistent, _indirect_buffer.total_size()); |
| 96 | } |
| 97 | |
| 98 | Status ClIndirectConv2d::validate(const ITensorInfo *src, |
| 99 | const ITensorInfo *weights, |
no test coverage detected