Method configure

src/gpu/cl/kernels/ClIndirectConv2dKernel.cpp:137–279

}

void ClIndirectConv2dKernel::configure(const CLCompileContext            &compile_context,
                                       ITensorInfo                       *src,
                                       ITensorInfo                       *weights,
                                       ITensorInfo                       *biases,
                                       ITensorInfo                       *indirect_buffer,
                                       ITensorInfo                       *dst,
                                       const PadStrideInfo               &conv_info,
                                       const ActivationLayerInfo         &act_info,
                                       const DirectConvComputeKernelInfo &desc)
{
    ARM_COMPUTE_ERROR_ON_NULLPTR(src, weights, indirect_buffer, dst);

    // Perform validation
    ARM_COMPUTE_ERROR_THROW_ON(
        validate_arguments(src, weights, biases, indirect_buffer, dst, conv_info, act_info, desc));

    constexpr unsigned int channel_idx   = 0;
    constexpr unsigned int width_idx     = 1;
    constexpr unsigned int height_idx    = 2;
    const unsigned int     kernel_width  = weights->dimension(width_idx);
    const unsigned int     kernel_height = weights->dimension(height_idx);
    const DataType         data_type     = src->data_type();

    const GPUTarget gpu_target = get_target();

    // Get dst shape
    TensorShape output_shape = misc::shape_calculator::compute_deep_convolution_shape(*src, *weights, conv_info);

    // Output auto inizialitation if not yet initialized
    auto_init_if_empty(*dst, output_shape, 1, src->data_type(), src->quantization_info());

    // Configure kernel window
    Window win;
    output_shape.collapse(2U, 1U);
    const unsigned int n0 = adjust_vec_size(desc.n0, output_shape[0]);
    const unsigned int m0 = adjust_vec_size(desc.m0, output_shape[1]);
    const unsigned int k0 = adjust_vec_size(desc.k0, src->dimension(channel_idx));

    const unsigned int partial_store_n0 = dst->dimension(channel_idx) % n0;

    // Create window and update padding
    win = calculate_max_window(output_shape, Steps(n0, m0));

    ICLKernel::configure_internal(win);

    std::stringstream kernel_name;
    CLBuildOptions    build_options;

    kernel_name << "indirect_convolution_nhwc";

    _export_to_cl_image = desc.export_weights_to_cl_image;

    // Update the padding for the weights tensor if we can export to cl_image
    if (_export_to_cl_image)
    {
        gemm::update_padding_for_cl_image(weights);
    }