| 96 | } |
| 97 | |
| 98 | void CpuDirectConv3d::run(ITensorPack &tensors) |
| 99 | { |
| 100 | ARM_COMPUTE_TRACE_EVENT(ARM_COMPUTE_PROF_CAT_CPU, ARM_COMPUTE_PROF_LVL_CPU, "CpuDirectConv3d::run"); |
| 101 | MemoryGroupResourceScope scope_mg(_memory_group); |
| 102 | |
| 103 | auto dst = tensors.get_tensor(TensorType::ACL_DST); |
| 104 | |
| 105 | NEScheduler::get().schedule_op(_conv_kernel.get(), _dim_split, _conv_kernel->window(), tensors); |
| 106 | |
| 107 | if (_is_activationlayer_enabled) |
| 108 | { |
| 109 | ITensorPack pack; |
| 110 | pack.add_tensor(TensorType::ACL_SRC, dst); |
| 111 | pack.add_tensor(TensorType::ACL_DST, dst); |
| 112 | _activationlayer_function->run(pack); |
| 113 | } |
| 114 | } |
| 115 | } // namespace cpu |
| 116 | } // namespace arm_compute |
nothing calls this directly
no test coverage detected