| 135 | } // namespace |
| 136 | |
| 137 | void CpuDepthwiseConv2dNativeKernel::configure(const ITensorInfo *src, |
| 138 | const ITensorInfo *weights, |
| 139 | const ITensorInfo *biases, |
| 140 | ITensorInfo *dst, |
| 141 | const ConvolutionInfo &info) |
| 142 | { |
| 143 | ARM_COMPUTE_TRACE_EVENT(ARM_COMPUTE_PROF_CAT_CPU, ARM_COMPUTE_PROF_LVL_CPU, |
| 144 | "CpuDepthwiseConv2dNativeKernel::configure"); |
| 145 | ARM_COMPUTE_ERROR_ON_NULLPTR(src, weights, dst); |
| 146 | ARM_COMPUTE_ERROR_THROW_ON(validate_arguments(src, weights, (biases != nullptr) ? biases : nullptr, dst, info)); |
| 147 | |
| 148 | _has_biases = (biases != nullptr); |
| 149 | _conv_info = info; |
| 150 | |
| 151 | const auto uk = CpuDepthwiseConv2dNativeKernel::get_implementation( |
| 152 | DepthwiseConv2dNativeDataTypeISASelectorData{weights->data_type(), src->data_type(), CPUInfo::get().get_isa()}); |
| 153 | ARM_COMPUTE_ERROR_ON(uk == nullptr || uk->ukernel == nullptr); |
| 154 | _func = uk->ukernel; |
| 155 | |
| 156 | const TensorShape output_shape = misc::shape_calculator::compute_depthwise_convolution_shape(*src, *weights, info); |
| 157 | auto_init_if_empty(*dst, src->clone() |
| 158 | ->set_is_resizable(true) |
| 159 | .reset_padding() |
| 160 | .set_tensor_shape(output_shape) |
| 161 | .set_quantization_info(dst->quantization_info())); |
| 162 | |
| 163 | Window win = calculate_max_window(*dst, Steps()); |
| 164 | ICpuKernel::configure(win); |
| 165 | } |
| 166 | |
| 167 | Status CpuDepthwiseConv2dNativeKernel::validate(const ITensorInfo *src, |
| 168 | const ITensorInfo *weights, |
nothing calls this directly
no test coverage detected