| 406 | } |
| 407 | |
| 408 | void |
| 409 | Arena::Initialize (bool minimal) |
| 410 | { |
| 411 | if (initialized) { return; } |
| 412 | initialized = true; |
| 413 | |
| 414 | // see reason on allowed reuse of the default CPU BArena in Arena::Finalize |
| 415 | BL_ASSERT(the_arena == nullptr || the_arena == The_BArena()); |
| 416 | BL_ASSERT(the_async_arena == nullptr); |
| 417 | BL_ASSERT(the_device_arena == nullptr || the_device_arena == The_BArena()); |
| 418 | BL_ASSERT(the_managed_arena == nullptr || the_managed_arena == The_BArena()); |
| 419 | BL_ASSERT(the_pinned_arena == nullptr); |
| 420 | BL_ASSERT(the_cpu_arena == nullptr || the_cpu_arena == The_BArena()); |
| 421 | BL_ASSERT(the_comms_arena == nullptr || the_comms_arena == The_BArena()); |
| 422 | |
| 423 | if (minimal) { |
| 424 | the_pinned_arena_init_size = 0; |
| 425 | } else { |
| 426 | #ifdef AMREX_USE_GPU |
| 427 | the_arena_init_size = Gpu::Device::totalGlobalMem() / Gpu::Device::numDevicePartners() / 4L * 3L; |
| 428 | #ifdef AMREX_USE_SYCL |
| 429 | the_arena_init_size = std::min(the_arena_init_size, Gpu::Device::maxMemAllocSize()); |
| 430 | #endif |
| 431 | #endif |
| 432 | } |
| 433 | |
| 434 | #ifdef AMREX_USE_GPU |
| 435 | the_pinned_arena_release_threshold = Gpu::Device::totalGlobalMem() / Gpu::Device::numDevicePartners() / 2L; |
| 436 | #endif |
| 437 | |
| 438 | // Overwrite the initial size with environment variables |
| 439 | if (char const* init_size_p = std::getenv("AMREX_THE_ARENA_INIT_SIZE")) { |
| 440 | IParser iparser(init_size_p); |
| 441 | auto exe = iparser.compileHost<0>(); |
| 442 | the_arena_init_size = exe(); |
| 443 | } |
| 444 | |
| 445 | ParmParse pp("amrex"); |
| 446 | pp.queryAdd( "the_arena_init_size", the_arena_init_size); |
| 447 | pp.queryAdd( "the_device_arena_init_size", the_device_arena_init_size); |
| 448 | pp.queryAdd("the_managed_arena_init_size", the_managed_arena_init_size); |
| 449 | pp.queryAdd( "the_pinned_arena_init_size", the_pinned_arena_init_size); |
| 450 | pp.queryAdd( "the_comms_arena_init_size", the_comms_arena_init_size); |
| 451 | pp.queryAdd( "the_arena_release_threshold", the_arena_release_threshold); |
| 452 | pp.queryAdd( "the_device_arena_release_threshold", the_device_arena_release_threshold); |
| 453 | pp.queryAdd("the_managed_arena_release_threshold", the_managed_arena_release_threshold); |
| 454 | pp.queryAdd( "the_pinned_arena_release_threshold", the_pinned_arena_release_threshold); |
| 455 | pp.queryAdd( "the_comms_arena_release_threshold", the_comms_arena_release_threshold); |
| 456 | pp.queryAdd( "the_arena_defragmentation", the_arena_defragmentation); |
| 457 | pp.queryAdd( "the_device_arena_defragmentation", the_device_arena_defragmentation); |
| 458 | pp.queryAdd("the_managed_arena_defragmentation", the_managed_arena_defragmentation); |
| 459 | pp.queryAdd( "the_pinned_arena_defragmentation", the_pinned_arena_defragmentation); |
| 460 | pp.queryAdd( "the_comms_arena_defragmentation", the_comms_arena_defragmentation); |
| 461 | pp.queryAdd("the_arena_is_managed", the_arena_is_managed); |
| 462 | pp.queryAdd("abort_on_out_of_gpu_memory", abort_on_out_of_gpu_memory); |
| 463 | |
| 464 | { |
| 465 | #if defined(BL_COALESCE_FABS) || defined(AMREX_USE_GPU) |
nothing calls this directly
no test coverage detected