Method gen_miss_trace

example/cacheHierarchy/simulator.cpp:14–48

using namespace std;

double Simulator::gen_miss_trace(string algo, uint64_t cache_size,
                                 string trace_path, string miss_output_path) {
  uint64_t n_req = 0, n_hit = 0;
  std::ofstream miss_ofs(miss_output_path);

  reader_init_param_t reader_init_params = {
      .time_field = 1, .obj_id_field = 2, .obj_size_field = 3, .next_access_vtime_field = 4};
  // see the cacheSimulator example for using csv trace
  reader_init_params.binary_fmt_str = "<IQIQ";
  reader_t *reader =
      open_trace(trace_path.c_str(), BIN_TRACE, &reader_init_params);
  common_cache_params_t cc_params = {.cache_size = cache_size};
  cache_t *cache = create_cache(algo.c_str(), cc_params, nullptr);

  request_t *req = new_request();

  bool hit;
  read_one_req(reader, req);
  while (req->valid) {
    n_req += 1;
    hit = cache->get(cache, req);
    if (!hit)
      miss_ofs << req->clock_time << "," << (uint64_t)req->obj_id << ","
               << req->obj_size << std::endl;
    else
      n_hit += 1;
    read_one_req(reader, req);
  }

  miss_ofs.close();
  std::cout << trace_path << ", object miss ratio "
            << 1.0 - (double)n_hit / n_req << std::endl;

  return 1.0 - (double)n_hit / n_req;
}

void Simulator::output_mrc(string &algo, vector<uint64_t> cache_sizes,
                           string &trace_path, string &mrc_output_path) {