JPDB is a GDB inspired debugger for debugging pre-silicon CPUs.
to get started
jpdb test_data/ibex/sim.fst --mapping-path test_data/ibex/signal_get.py
your system python must be 3.10 or newer, otherwise jpdb might bark at you
jpdb can be installed via cargo
cargo install jpdb --locked
the releases page on github
The mapping file for JPDB is the translation layer that makes signals understandable for JPDB's internal gdb server stub.
the mapping file MUST contain a function named get_gdb_signals that returns a
python dict. The returned python dictionary MUST contain the following keys:
* pc: signal for the current retired pc
* x0-x31: signals for each architectural general purpose register
an example mapping file is below ```python def get_gdb_signals(wave: Waveform) -> Dict[str, Signal]: pc = wave.get_signal_from_path( "TOP.ibex_simple_system.u_top.u_ibex_top.u_ibex_core.wb_stage_i.pc_wb_o" ) gprs = { f"x{i}": wave.get_signal_from_path( f"TOP.ibex_simple_system.u_top.u_ibex_top.gen_regfile_ff.register_file_i.rf_reg.[{i}]" ).sliced(0, 31) for i in range(32) }
rv = {"pc": pc, **gprs}
return rv
To just verify that the mapping file is well formed, you can execute
```bash
jpdb test_data/ibex/sim.fst --mapping-path test_data/ibex/signal_get.py --verify-only
although this will happen when you launch jpdb normally
not yet, but if you give me a wave dump of a superscalar CPU, i will add support and thank you kindly
only RV32G, but if you have a dump of another instruction set, i will add support and thank you kindly
probably not, file an issue and i'll make that optional
yeah i need to fix that sorry
no, but it could integrate with vaporview or surfer fairly easily
wellen library made this easy, thank you kevin laeufer
also tom verbeure did something similar a while back, shoutout